SerDes Design and Verification for PAM3 and PAM4 High-Speed Digital Links
Learn to optimize SerDes systems for PAM3 and PAM4 modulation using SerDes Toolbox. The requirements of emerging wireline communication systems for higher data rates is driving the need for SerDes systems to operate with higher order modulation schemes such as PAM3 and PAM4.
SerDes systems architectures and adaption algorithms need to change for achieving this mandatory performance. Accurate system-level models of the physical layer including impairments such as jitter, crosstalk, and non-linearity are required in the study and development of innovative architectures.
In this presentation, you will learn how to model PAM3 and PAM4 SerDes systems using measurement data and data sheet specifications, and integrate smarter adaptation and optimization algorithms.
Learn more about SerDes Toolbox:
Chapters:
00:00 Introduction to SerDes Systems
02:54 PAM3 SerDes Design and Analysis
10:42 Adding Jitter and Crosstalk Impairments
12:07 PAM4 Custom SerDes Equalization Algorithms
16:34 PAM3 or PAM4 IBIS-AMI Model Generation
18:41 Conclusion
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