George Hotz | Programming | twitchcore: a little RISC-V core | in Python | in Verilog | on FPGA
Date of stream 11 Jun 2021.
Live-stream chat added as Subtitles/CC - English (Twitch Chat).
Stream title: twitchcore: a little RISC-V core
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Chapters:
00:00:00 RISC-V core in Python
03:59:28 RISC-V core in Verilog
05:55:11 RISC-V core on FPGA
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